With the improvement of the performance of power semiconductor devices and the innovation of switching technology, power electronics technology has been widely applied to a wide variety of power supply devices. At present, switching power supply products are becoming more and more compact, high speed and high density. This trend has caused electromagnetic compatibility problems to become more and more serious. The high-frequency switching process of voltage and current generates a large amount of EMI (electromagnetic interference). If this interference is not limited, it will seriously affect the normal operation of surrounding electrical equipment. Therefore, the PCB design of the switching power supply is a crucial aspect to solve the electromagnetic compatibility problem of the switching power supply. The reason why the PCB is regarded as an indispensable component in the design of the switching power supply is that it is responsible for the dual connection of the electrical components and mechanical components of the switching power supply, and is the key to reducing the EMI design of the electronic device.
1 Electromagnetic interference problems in PCB design
1.1 Electromagnetic coupling interference
In circuit design, electromagnetic coupling interference mainly affects other circuits through conduction coupling and common mode impedance coupling. From the perspective of EMC design, the switching power supply circuit is different from the ordinary digital circuit, and has relatively obvious interference sources and sensitive lines. In general, the interference source of the switching power supply is mainly concentrated on components and wires with large voltage and current change rates, such as power FETs, fast recovery diodes, high frequency transformers, and wires connected thereto. The sensitive line mainly refers to the control circuit and the line directly connected to the interference measuring device, because these interference coupling may directly affect the normal operation of the circuit and the interference level of the external transmission. Common mode impedance coupling is when the current of two circuits passes through a common impedance, and the voltage formed by one circuit's current on the common impedance affects the other circuit.
1.2 crosstalk interference
Crosstalk between lines, wires, and cables in printed circuit boards (PCBs) is one of the most difficult problems in printed circuit board wiring. The crosstalk mentioned here is a crosstalk in a broader sense, regardless of whether the source is a useful signal or noise, and the crosstalk is represented by the mutual capacitance and mutual inductance of the wires. For example, a strip line on the PCB carries control and logic levels, and a second strip line that is close to it carries a low level signal. When the parallel wiring length exceeds 10 cm, crosstalk interference is expected; Crosstalk interference also becomes a major issue when a long cable carries several sets of serial or parallel high speed data and remote lines. The crosstalk between the nearby wires and the cable is caused by the electric field passing through the mutual capacitance, and the magnetic field is caused by the mutual inductance.
When considering the problem of linear crosstalk on the PCB, the most important problem is to determine which of the electric field (mutual capacitance) and magnetic field (mutual inductance) coupling is more important. Determining which coupling model depends primarily on line impedance, frequency, and other factors. In general, capacitive coupling is dominant at high frequencies, but if one or both of the source or receiver is shielded and grounded across the shield, magnetic coupling will be dominant. In addition, there is generally a lower circuit impedance and inductive coupling at low frequencies.
1.3 Electromagnetic radiation interference
Radiated interference is interference introduced by the radiation of spatial electromagnetic waves. PCB electromagnetic radiation is divided into two types: differential mode radiation and common mode radiation. In most cases, the conducted interference generated by the switching power supply is dominated by common mode interference, and the radiated effect of common mode interference is much larger than that of differential mode interference. Therefore, reducing common mode interference is particularly important in the EMC design of switching power supplies. _)(^$RFSW#$%T
2 PCB interference suppression steps
2.1 PCB design information
When designing a PCB, you need to know the design information of the board, which includes the following:
(1) number of devices, device size, device package;
(2) The requirements of the overall layout, the location of the device layout, the presence or absence of high-power devices, and the special requirements for heat dissipation of the chip devices;
(3) The rate of the digital chip, whether the PCB is divided into low-speed medium-speed high-speed zones, and which are interface input-output zones;
(4) Type rate and transmission direction of signal lines, impedance control requirements of signal lines, bus speed direction and driving conditions, key signals and protection measures;
(5) Type of power supply, type of ground, noise tolerance requirements for power supply and ground, setting and division of power supply and ground plane;
(6) The type and rate of the clock line, the source and destination of the clock line, the clock delay requirement, and the longest trace requirement.
2.2 PCB layering
The first step is to determine the number of routing layers and power layers required to implement the function within an acceptable cost range. The number of layers of the board is determined by detailed functional requirements, immunity, separation of signal classes, device density, bus routing, and the like. At present, the circuit board has been gradually developed from single-layer, double-layer and four-layer boards to more layers of circuit boards. Multi-layer printed board design is the main measure to achieve electromagnetic compatibility standards.
(1) Allocating separate power and ground layers can suppress the inherent common mode interference and reduce the point source impedance;
(2) The power plane and the ground plane are as close to each other as possible, generally the plane is above the power plane;
(3) It is better to layout the digital circuit and the analog circuit in different layers;
(4) The wiring layer is preferably adjacent to the entire metal plane;
(5) The clock circuit and high frequency circuit are the main sources of interference and should be handled separately.
2.3 PCB layout
The key to the EMC design of printed boards is layout and routing, which is directly related to the performance of the board. At present, EDA automation of board layout is very low and requires a lot of manual placement. Before the layout, you must determine the PCB size that meets the function at the lowest possible cost. If the PCB size is too large and the device distribution is dispersed during layout, the transmission line may be long, which causes an increase in impedance, a decrease in noise resistance, and an increase in cost. If the devices are placed in a concentrated manner, the heat dissipation is not good, and the adjacent traces are prone to coupling crosstalk. Therefore, it is necessary to layout according to the circuit function unit, taking into account factors such as electromagnetic compatibility, heat dissipation and interface. There are some principles to follow when doing the overall layout:
(1) Arrange the functional circuit units according to the flow of the circuit signal so that the signal circulation remains in the same direction;
(2) centering on the core components of each functional circuit unit, and other components are arranged around it;
(3) Minimize the wiring between high-frequency components and try to reduce their distribution parameters;
(4) Components that are susceptible to interference should not be too close to each other, and input and output components should be kept away;
(5) Prevent mutual coupling between power lines, high-frequency signal lines, and general traces.
2.4 PCB wiring
(1) Wiring principle
When wiring, classify all signal lines. First cloth clock, sensitive signal line, and then high-speed signal line, after ensuring that there are enough holes in such signals, and the distribution parameters are good, then the general unimportant signal lines are placed. The principles that should be followed are:
1) The wires at the input and output terminals should avoid the parallel of adjacent long distances as much as possible; to reduce the crosstalk of long parallel traces, the line spacing can be increased, or the ground lines can be inserted between the lines;
2) Do not change the width of the circuit board, do not suddenly corner the wire, keep the line impedance as continuous as possible, and the arc of the printed transmission line generally goes arc or at 135° angle;
3) Pay special attention to the power supply and ground line distribution of high frequency circuits;
4) reduce the wire loop area of the current circulation process, because the external radiation of the current carrying loop is proportional to the passing current, the loop area and the signal frequency;
5) Arrange the grounding input pins scattered on the circuit board plug to help reduce the loop area and ground impedance of the circuit board pin wiring;
6) Reduce the length of the wire and increase the width of the wire, which is beneficial to reduce the impedance of the wire.
(2) EMC wiring design of printed circuit
According to the interference electric field distribution map, the EMC layout of the printed circuit is designed. The basic idea is to place the sensitive line in the area with weak interference. According to the concept of "coupling coefficient", the distribution capacitance between printed lines is estimated in real time. The PCB can be modified and improved in time to reduce the conduction interference of the PCB.
Choosing the right layout scheme first calculates the interference intensity profile of the interference source. Most switching power supplies have switching frequencies between tens of kHz and several MHz, so the disturbing electric field on the PCB surface can be used for quasi-static field analysis. Under this assumption, the field quantity can be written as the product of the space and time quantities independent of each other. Therefore, the displacement current J(x, y, z, t) can be written as:
By solving the Laplace equation (2), the spatial component of the potential at each point in the space can be solved, and the dielectric constant can be multiplied by the operation. The spatial component of the corresponding displacement current density can be obtained. After visual calculation, the corresponding Study on Electromagnetic Compatibility of Switching Power Supply PCB Board with Interference Intensity Distribution
2.5 PCB anti-interference circuit
For digital control systems of large switching power supplies, each logic device has a corresponding valve level and noise tolerance. The external noise can work normally as long as the external noise does not exceed the tolerance of the logic device. However, once the noise or interference entering the system exceeds a certain tolerance, the interference signal is amplified by the logic device and formed into an important cause of malfunction. The most sensitive ones are the clock signal, the reset signal and the interrupt signal. These three kinds of signal lines should pay special attention when laying the PCB. When the function is satisfied, the crystal with the lowest frequency should be selected.
The watchdog circuit is one of the anti-interference measures. When strong electromagnetic interference, the power grid spike interference causes the microcontroller system to deadlock, the watchdog circuit can automatically detect and resume the program.
When the system is subjected to strong interference and loses its normal working state, the data in the RAM is often destroyed. Therefore, in addition to careful design of the power system, a reliable RAM protection circuit must be designed.
The data bus of the circuit, the address bus and the control bus are exchanged information. If the load capacity of the bus is increased, the signal waveform is improved when the bus transmission is long. In this case, a tri-state buffer gate circuit needs to be configured as the bus driver. In addition, care should be taken to ensure load balancing of the bus.
The pull-up resistor on the bus can improve the reliability of the bus signal transmission, not only improve the signal level, but also improve the anti-electromagnetic interference capability of the bus, suppress static interference, and weaken the reflected wave interference. When the chip has a built-in pull-up resistor, it is not necessary to install a pull-up resistor on the external circuit. For the chip pins on the circuit, the unused input is fixed at a high level to enhance the suppression of external electromagnetic interference.