Package means that the circuit pins on the silicon chip are wired to the external connectors for connection with other devices. The package form refers to a case for mounting a semiconductor integrated circuit chip. It not only functions to install, fix, seal, protect the chip and enhance the electrothermal performance, but also connects to the pins of the package by wires on the chip, and these pins pass through the wires on the printed circuit board. It is connected to other devices to connect the internal chip to external circuits. Because the chip must be isolated from the outside world to prevent corrosion of the chip circuit by impurities in the air, the electrical performance is degraded. On the other hand, the packaged chip is also easier to install and transport. It is crucial because the quality of the packaging technology directly affects the performance of the chip itself and the design and manufacture of the PCB (printed circuit board) to which it is connected. An important indicator for measuring the advancement of a chip package technology is the ratio of chip area to package area. The ratio is closer to 1 and better.
The main factors to consider when packaging:
1, the ratio of chip area to package area is to improve packaging efficiency, as close as possible to 1:1;
2, the pin should be as short as possible to reduce the delay, the distance between the pins as far as possible to ensure mutual interference, improve performance;
3. Based on the requirements of heat dissipation, the thinner the package, the better. The package is mainly divided into DIP dual in-line and SMD chip package. In terms of structure, the package experienced the earliest transistor TO (such as TO-89, TO92) package and developed into a dual in-line package. Subsequently, PHILIP developed a small SOP package, and later derived SOJ (J type). Pin small outline package), TSOP (thin small outline package), VSOP (very small outline package), SSOP (reduced SOP), TSSOP (thin reduced SOP) and SOT (small outline transistor), SOIC (small outline) Integrated circuit) and so on.
From the material media, including metals, ceramics, plastics, plastics, there are still a lot of metal packaging for circuits that require high-intensity working conditions, such as military and aerospace.
The package has undergone the following development process:
Structural aspects: TO->DIP->PLCC->QFP->BGA->CSP; Material: metal, ceramic->ceramic, plastic->plastic; pin shape: long lead in-line->short lead or no lead Mounting->spherical bumps; assembly method: through-hole insertion->surface assembly->direct installation of specific package form
1, SOP / SOIC package
SOP is the abbreviation of English Small Outline Package, which is a small outline package. The SOP packaging technology was developed by Philips from 1968 to 1969. Later, it gradually derived SOJ (J-type small outline package), TSOP (thin small outline package), VSOP (very small outline package), SSOP (reduced type). SOP), TSSOP (Thin Reduced SOP) and SOT (Small Outline Transistor), SOIC (Small Outline Integrated Circuit), etc.
2, DIP package
DIP is the abbreviation of English Double In-linePackage, which is a dual in-line package. One of the plug-in packages, the leads are led out from both sides of the package, and the package materials are plastic and ceramic. DIP is the most popular plug-in package, and its application range includes standard logic IC, memory LSI, and microcomputer circuit.
3, PLCC package
PLCC is the abbreviation of English Plastic Leaded Chip Carrier, which is a plastic J lead chip package. The PLCC package is square in shape, 32-pin package, and has pins around it. The external dimensions are much smaller than the DIP package. The PLCC package is suitable for mounting wiring on the PCB using SMT surface mount technology, which has the advantages of small size and high reliability.
4, TQFP package
TQFP is the abbreviation of English thin quad flat package, which is a thin plastic four-corner flat package. The Quad Flat Package (TQFP) process effectively utilizes space, reducing the need for printed circuit board space. Due to the reduced height and volume, this packaging process is ideal for space-critical applications such as PCMCIA cards and networking devices. Almost all ALTERA CPLDs/FPGAs have a TQFP package.
5, PQFP package
PQFP is the abbreviation of English Plastic Quad Flat Package, which is a plastic four-corner flat package. The PQFP package has a small distance between the chip pins and a very small pin. Generally, large-scale or very large-scale integrated circuits use this package, and the pin count is generally above 100.
6, TSOP package
TSOP is the abbreviation of English Thin Small Outline Package, which is a small and small package. A typical feature of TSOP memory packaging technology is the ability to make pins around the packaged chip. The TSOP is suitable for mounting wiring on a PCB (printed circuit board) using SMT technology (surface mount technology). In the case of the TSOP package, the parasitic parameters (when the current changes greatly, causing the output voltage disturbance) are reduced, suitable for high frequency applications, easy to operate, and high reliability.
7, BGA package
BGA is the abbreviation of English Ball Grid Array Package, which is a ball grid array package.
With the advancement of technology in the 1990s, the integration of chips continued to increase, the number of I/O pins increased sharply, power consumption also increased, and the requirements for integrated circuit packaging were also stricter. In order to meet the needs of development, BGA packaging began to be applied to production.
The memory packaged by BGA technology can increase the memory capacity by two to three times when the memory volume is constant. Compared with TSOP, BGA has smaller volume, better heat dissipation performance and electrical performance. BGA packaging technology has greatly improved the amount of memory per square inch. The memory products with BGA package technology are only one-third of the TSOP package under the same capacity. In addition, the BGA package is compared with the traditional TSOP package. The way there is a faster and more efficient way to dissipate heat.
The I/O terminals of the BGA package are distributed in the form of arrays of circular or columnar solder joints under the package. The advantage of the BGA technology is that although the number of I/O pins is increased, the pitch of the pins is not reduced but increased. Increased assembly yield; although its power consumption increases, BGA can be soldered with a controlled collapse chip method to improve its electrothermal performance; thickness and weight are reduced compared to previous packaging techniques; parasitic parameters are reduced, The signal transmission delay is small, the frequency of use is greatly improved; the assembly can be used for coplanar welding with high reliability.
When it comes to BGA packaging, you can't help but mention Kingmax's patented TinyBGA technology. TinyBGA English is called Tiny Ball GridArray (small ball grid array package), which belongs to a branch of BGA packaging technology. It was developed by Kingmax in August 1998. The ratio of chip area to package area is not less than 1:1.14, which can increase the memory capacity by 2-3 times when the memory volume is constant, compared with TSOP package products. It has a smaller volume, better heat dissipation and electrical properties.
Memory products using TinyBGA package technology are only 1/3 of the size of the TSOP package at the same capacity. The pins of the TSOP package memory are drawn from around the chip, while the TinyBGA is derived from the center of the chip. This method effectively shortens the transmission distance of the signal, and the length of the signal transmission line is only 1/4 of that of the conventional TSOP technology, so the attenuation of the signal is also reduced. This not only greatly improves the anti-interference and anti-noise performance of the chip, but also improves the electrical performance.
The TinyBGA package can withstand up to 300MHz FSB, while the traditional TSOP package technology can only withstand 150MHz FSB.
The memory of the TinyBGA package is also thinner (package height is less than 0.8mm), and the effective heat dissipation path from the metal substrate to the heat sink is only 0.36mm. As a result, TinyBGA memory has higher heat transfer efficiency and is ideal for long-running systems with excellent stability.